Output sample-and-hold signal with external trigger
The Asynchronous Sample & Hold block sets the output signal, Y, equal to the input signal, U, when the rising edge of the trigger input becomes greater than zero. Use this block, in conjunction with other physical signal blocks, to model discrete and event-based behaviors.
Both inputs and the output are physical signals.
The Asynchronous PWM Voltage Source example illustrates how you can use the Asynchronous Sample & Hold block to build components with more complex behaviors. For an alternative discrete-time implementation, see the Discrete-Time PWM Voltage Source example. The discrete-time version is better suited to fixed-step solvers and hardware-in-the-loop applications, whereas the asynchronous implementation is better suited to fast desktop simulation using variable-step solvers.